rizer.electrical_model.components.source_circuit#

Classes#

`SourceCircuit`	Abstract one-port voltage source: an ideal waveform behind some source-side network.
`ResistiveSourceCircuit`	An ideal voltage waveform in series with a source resistance R_g.
`CapacitiveSourceCircuit`	An ideal voltage waveform in series with R_g, with a capacitor C_s in parallel at the output.
`ParallelCapacitiveSourceCircuit`	An ideal voltage waveform behind R_g, with a capacitor C_s in parallel with R_g itself.

Functions#

get_source_circuit_from_input(→ SourceCircuit)

Build a SourceCircuit (any variant) from a source:-shaped block.

Module Contents#

class rizer.electrical_model.components.source_circuit.SourceCircuit#

Bases: abc.ABC

Abstract one-port voltage source: an ideal waveform behind some source-side network.

Common to every variant (ResistiveSourceCircuit, CapacitiveSourceCircuit, ParallelCapacitiveSourceCircuit) is that each represents a complete source network with one accessible terminal, driven internally by a BaseGenerator waveform. What sits between that waveform and the terminal differs enough between variants (a plain series resistance; a resistance plus a capacitor, either shunting the output node or bridging the resistance itself – both genuinely stateful and changing the solving strategy entirely) that there is no shared attribute or method to make abstract here – downstream circuits (TransmissionLineResistiveCircuit, TransmissionLineRCLoadCircuit, TransmissionLineCapacitiveSourceResistiveLoadCircuit, TransmissionLineParallelCapacitiveSourceResistiveLoadCircuit) require the specific subclass they know how to solve for, not this base.

class rizer.electrical_model.components.source_circuit.ResistiveSourceCircuit(generator: rizer.electrical_model.components.generator.BaseGenerator, R_g: float)#

Bases: SourceCircuit

An ideal voltage waveform in series with a source resistance R_g.

The Thevenin-equivalent source every existing cable/direct-load circuit in this package is built from.

Parameters:

generator (BaseGenerator) – The open-circuit voltage waveform.
R_g (float) – Source resistance in Ohm.

generator#

R_g#

class rizer.electrical_model.components.source_circuit.CapacitiveSourceCircuit(generator: rizer.electrical_model.components.generator.BaseGenerator, R_g: float, C_s: float, u_s_0: float = 0.0)#

Bases: SourceCircuit

An ideal voltage waveform in series with R_g, with a capacitor C_s in parallel at the output.

[Generator] --[R_g]--+--[C_s]--+-- (source terminal)
   V_g(t)

Unlike ResistiveSourceCircuit, this source is stateful: its own terminal voltage is the solution of an ODE (see TransmissionLineCapacitiveSourceResistiveLoadCircuit), not an instantaneous function of generator/R_g alone.

Parameters:

generator (BaseGenerator) – The open-circuit voltage waveform.
R_g (float) – Source resistance in Ohm.
C_s (float) – Capacitance in parallel at the source’s own output node [F].
u_s_0 (float, optional) – Initial voltage across C_s at t=0 [V]. Default 0 V.

generator#

R_g#

C_s#

u_s_0 = 0.0#

class rizer.electrical_model.components.source_circuit.ParallelCapacitiveSourceCircuit(generator: rizer.electrical_model.components.generator.BaseGenerator, R_g: float, C_s: float, u_c_0: float = 0.0)#

Bases: SourceCircuit

An ideal voltage waveform behind R_g, with a capacitor C_s in parallel with R_g itself.

[Generator] --+--[R_g]--+-- (source terminal)
   V_g(t)      |         |
              [C_s]------+

Unlike CapacitiveSourceCircuit (C_s shunting the terminal to ground), here C_s bridges directly from the generator’s own output to the terminal, in parallel with R_g – a different network with a different ODE (see TransmissionLineParallelCapacitiveSourceResistiveLoadCircuit). This source is stateful: its own terminal voltage is not an instantaneous function of generator/R_g alone.

Parameters:

generator (BaseGenerator) – The open-circuit voltage waveform.
R_g (float) – Source resistance in Ohm.
C_s (float) – Capacitance in parallel with R_g [F].
u_c_0 (float, optional) – Initial voltage across C_s (and across R_g) at t=0 [V]. Default 0 V.

generator#

R_g#

C_s#

u_c_0 = 0.0#

rizer.electrical_model.components.source_circuit.get_source_circuit_from_input(source_input: dict[str, Any]) → SourceCircuit#

Build a SourceCircuit (any variant) from a source:-shaped block.

Dispatches on source_input.get("type", "resistive"):

"resistive" (default): ResistiveSourceCircuit, needs generator, R_g.
"c_shunt": CapacitiveSourceCircuit, needs generator, R_g, C_s; optional u_s_0.
"c_parallel": ParallelCapacitiveSourceCircuit, needs generator, R_g, C_s; optional u_c_0.

Parameters:

source_input (dict) – generator: same shape get_generator_from_input() takes. R_g: the source resistance [Ohm]. type, optional: one of the values above, default “resistive”. C_s, u_s_0/u_c_0: required/optional per type, see above.

Return type:

SourceCircuit

Raises:

KeyError – If generator, R_g, or (for the capacitive variants) C_s is missing.
ValueError – If type is not one of “resistive”, “c_shunt”, “c_parallel”.